The flash memory can be divided into a NOR flash memory and a NAND flash memory depending on connection states of a memory cell and a bit line. The NOR flash memory may have a fast read speed but a slow write speed, such that it is typically used as a code memory. Additionally, since the NAND flash memory has a fast write speed and has a low cost per unit area, it is generally used as a high capacity data storage. If comparing the flash memory with other memory devices, the flash memory can provide a fast read speed with a relatively low unit cost. However, erase operation is performed before writing data therein and the data unit to be erased is larger than data unit to be written in the flash memory. These characteristics may make the flash memory more difficult to be used as a main memory, and may also make it more difficult for a file system of a general hard disk to be used if the flash memory is used as an auxiliary memory device.
Accordingly, in order to hide an erase operation of the flash memory, a flash translation layer (FTL) between a file system and a flash memory may be used. During a write operation of the flash memory, the FTL can map a logical address generated from a file system into a physical address of a flash memory where an erase operation is performed. During a write operation of a flash memory, the FTL can map a logical address generated from a file system into a physical address of a flash memory where an erase operation is performed. The FTL may utilize an address mapping table in order to perform fast address mapping. Due to the address mapping of the FTL, a host can recognize a flash memory device as a hard disk drive (or, SRAM) and then accesses a flash memory device through the same method as a hard disk drive. The FTL may be realized in a form of a hardware separated from a host system, or in a form of a device drive inside a host system.
Moreover, a flash memory device may face a situation where re-booting may be needed due to serious errors during operations. The most typical situation is an unexpected power failure (e.g., a black out). When a power failure occurs, all memory blocks may be scanned after re-booting in order to read mapping information stored in a specific region within each memory block, and then a mapping table is constructed in SRAM. However, if a power failure occurs during a program operation, it may be difficult to determine a programmed state of a memory cell (i.e., whether a memory cell is normally programmed or not).